1. Field of the Invention
The present invention relates to DC-DC converters which include a main switch element and a sub switch element and an inductor, and convert an input DC voltage into a desired DC voltage and then output the desired DC voltage by alternately turning the main switch element and the sub switch element on and off.
2. Description of the Related Art
A step-down chopper circuit DC-DC converter such as that described in Japanese Unexamined Patent Application Publication No. 11-235022 is a known example of a power supply circuit that is provided inside of, for example, a mobile electronic appliance. Such a step-down chopper circuit DC-DC converter includes a circuit for preventing a reverse current from flowing to ground via an inductor from a capacitor when there is a light load (hereafter, referred to as “reverse flow of inductor current”).
FIG. 1 is a circuit diagram of a DC-DC converter 3 described in Japanese Unexamined Patent Application Publication No. 11-235022. This DC-DC converter 3 includes a first switch 11, a second switch 15, an inductor 12, a capacitor 13 and a diode 14.
In FIG. 1, a voltage integration control circuit 23 includes a voltage-current conversion circuit 31 that detects an input voltage Vi and an output voltage Vo and converts the voltages Vi and Vo, with or without subjecting them to adjustment processing, into a current, whereby a current is generated in accordance with an amount of change dIL/dt of an induced current IL, a current-voltage conversion capacitor 32 that stores an output current of the voltage-current conversion circuit 31 and converts the current into a voltage, a comparator 33 that compares an output voltage Vc of the current-voltage conversion capacitor 32 with a reference voltage Vref1 having a predetermined value, and a power supply 34 that generates the reference voltage Vref1 and inputs the reference voltage Vref1 to the comparator 33.
The voltage-current conversion circuit 31 generates a current that is proportional to Vi−Vo on the basis of the input voltage Vi and the output voltage Vo when the first switch 11 is in a conductive state and causes the current to flow into the current-voltage conversion capacitor 32. On the other hand, when the first switch 11 is in a disconnected state, the voltage-current conversion circuit 31 extracts a current that is proportional to the output voltage Vo from the current-voltage conversion capacitor 32.
Thus, the voltage Vc across the two ends of the current-voltage conversion capacitor 32 changes in proportion to a forward direction current flowing through the inductor 12. Therefore, the point in time at which a reverse current begins to flow through the inductor 12 can be detected as a point in time at which the voltage Vc becomes 0 V. As a result, the comparator 33 compares the voltage Vc and the reference voltage Vref1 and so long as the comparator 33 instructs a control circuit 21 to disconnect the second switch 15 before the voltage Vc becomes 0 (V), the second switch 15 can be disconnected before a reverse direction current flows through the inductor 12. With this configuration, it is attempted to prevent reverse flow of an inductor current.
However, the DC-DC converter of the related art illustrated in FIG. 1 has a configuration in which detection of a capacitor potential becoming 0 V is performed by using a comparator, and therefore the frequency is high and a transmission delay time of the comparator cannot be ignored. That is, the output of the comparator has a response delay equal to a transmission delay time, and therefore reverse flow of a current and loss occur due to such a delay when there is a light load. If a comparator having a shorter transmission delay time is used, the period of time during which reverse flow of a current occurs is shortened, but a high-speed comparator having a short transmission delay time typically consumes a very large amount of power and therefore the efficiency of the DC-DC converter as a whole is reduced. In addition, as illustrated in FIG. 1, although a delay compensation method that uses an offset reference voltage Vref1 is known, the compensation is not perfect because there is a different delay time for each set of operating conditions. In addition, a stable voltage circuit such as a band gap circuit has to be used for Vref1, and there are issues that need to be solved such as a circuit area being needed.